XTEA Block Cipher IP Core for FPGA and ASIC

The flexible and highly scalable InformAsic XTEA core makes it possible to add encryption functionality into an FPGA or ASIC design. The core requires minimal hardware resources, hence it is suitable for designs where resource intensive algorithms like AES and 3DES does not fit.

The InformAsic XTEA core implements the XTEA (Extended Tiny Encryption Algorithm) block cipher, developed by Wheeler and Needham. This cipher is suitable for embedded solutions where high security with a small footprint is needed. The cipher uses a 128 bit key and works on 64 bits blocks. The core implements ECB mode but other modes can be provided upon request.

The core provides the ability to balance between performance and security by selecting the number of rounds to be performed on any given block at compile time. (Note that at least 24 rounds per block is recommended)The core is suitable for embedded systems with moderate bandwidth requirements, i.e. up to 100 Mbit/s. The core features a very fast two-cycle-only setup time and the core complete each round in two cycles. This means that a 32 round operation has a total latency of 66 cycles. All inputs and outputs are registered and the design uses no memory blocks, multipliers or DSP functions. The design also uses a single positive edge triggered clock and a single synchronous, active low reset.

 

FEATURES
Block cipher for embedded SoC solutions   
Implements the standardized XTEA cipher with 128 bit key and 64 bit block size   
Provides hardware accelerated crypto processing support with a very small footprint
Compile time control of number of rounds allows to balance between performance and security
Cipher initialization in two cycles   
66 cycles total latency for 32 rounds   
Can be delivered as Verilog 2001 RTL Source or EDIF Netlist   
Delivered with Reference Model, Design Integration Example and Documentation

 

FPGA Model Logic Utilization [LE] Registers Frequency [MHz]
Altera Cyclone-II (EP2C20 C6) 565 [LE] 238 100
Altera Stratix-II (EP2S15 C3) 435 [ALUT] 238 135
Xilinx Spartan 2E 566 [LC] 238 80

 

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