The IP Core Rule 30 from Informasic is a high performance and low complex PRNG (pseudo random number generator) that is suitible for generating test data for FPGA accelerated verifying, testing structures on chip, or to generate controlled random traffic. In addition the Core is requiring minimal resources from the hardware.

Cellular automaton

A cellular automaton is a discrete model consisting of a regular grid of cells, each in one of a finite number of states. Every cell has the same rule for updating, based on the values in this neighbourhood. Each time the rules are applied to the whole grid a new generation is created.

One such set of rules is Rule 30, published by Stephen Wolfram. These rules generates apparent randomness despite the lack of anything that could reasonably be considered random input. Or more mathematical expressed; the rules create a chaotic, aperiodic behaviour of the cellular automaton. The cellular automaton could therefore be used as a random number generator.

Note. Even if Rule 30 is generating a good, rectangular random sequence it is however not a secure cryptograhic PRNG. Rule 30 should hence not be used for streaming crypto or key generation.

Implementation

Informasic's IP Core Rule 30 implements a one dimensional cellular automaton where the ends are joined to a ring. The cellular automoton consists of 32 one bit cells, that make the automoton generating a 32 bit word each cycle.

The design has been implemented in an Altera Cyclone II FPGA. The design requires 32 registers and 64 LE:s. The maximal internal clock frequency is slightly above 400 MHz and provides a PRNG bandwith of 1.6 GByte/s.

The Rule 30 Core includes RTL code in Verilog 2001, documentation, test bench, and a script file to simulate the design using the open source Verilog simulator, Icarus Verilog.

The license for using the IP Core Rule 30 is a so called Two Clause BSD License.

The Core can be downloaded on page Products/IP Cores/Rule 30 Random Number Generator .